Based on PCMem, we can build a MPC total hierarchy architecture from MPU to CPU to MPC cluster. <\/p>\n\n\n\n
Herein, CPU can be CGPU which combines CPU and GPU. MPC is Memory Parallel Computing. MPU is Memory Processing Unit. PCMem is Parallel Computing Memory.<\/p>\n\n\n\n
One MPC cluster in MPC total architecture can be formed by 2 following layers:<\/p>\n\n\n\n
layer-1) From MPUs to CPU<\/p>\n\n\n\n
For one CPU: dedicated memory per MPU – <dedicated internal bus in between> – each MPU – <PCMem chip bus> – PCMem chip – <PCMem stick bus> – PCMem stick I\/O – <motherboard bus> – the CPU.<\/p>\n\n\n\n
All above from memory to CPU connected to one CPU form one CPU domain, which is one single broadcast domain.<\/p>\n\n\n\n
layer-2) From CPUs to MPC cluster<\/p>\n\n\n\n
Multiple CPU domains as above can connect together to form a MPC cluster, and this MPC cluster forms one broadcast domain combined by the multiple CPU domains.<\/p>\n\n\n\n
The MPC cluster can have a reduction tree for sum & max. which extends the universal reduction tree in each CPU domain in and outside MPU.<\/p>\n\n\n\n
The different CPU domains in one MPC cluster can do parallel read\/write to improve the read\/write speed of PCMem.<\/p>\n\n\n\n
The CPU domains in one MPC cluster can dynamically form multiple subclusters each of which is a separated broadcast subdomain, so one MPC cluster can contain different models and tasks flexibly.<\/p>\n\n\n\n
Through MPC cluster, more PCMem sticks can work together to contain larger memory space for longer context with higher read\/write speed of PCMem.<\/p>\n","protected":false},"excerpt":{"rendered":"
Based on PCMem, we can build a MPC total hierarchy architecture from MPU to CPU to MPC cluster. Herein, CPU can be CGPU which combines…<\/p>\n